The present invention relates generally to computer memory, and more specifically to the correction of duty cycle distortion in double data rate (DDR) memory systems.
In a DDR memory system, data is transmitted as a data query (DQ) over a DQ channel as a wave, with a high half of the wave indicating a binary 1, and a low half of the wave indicating a binary 0. DDR memory operates as a bursting memory system. Bursting memory systems do not operate with a steady state clock operating under a steady frequency. Instead, a data query strobe (DQS) is issued as a wave to indicate that data is being transmitted over the DQ channel. The undulation of the wave is called a duty cycle. The duty cycle of the DQS must be synchronized with the data in the DQ. The alignment of the DQ and DQS creates a data eye, which marks when the data should be collected by the latches of the memory system. Fluctuations in the DQ and DQS can affect the duty cycle which cause the waves be become misaligned and result in a narrowing of the data eye. As the data eye narrows, the probability of a misread of the DQ increases. One of the fluctuations in the DQ and DQS is called duty cycle distortion.
Duty cycle distortion is present in both the DQ and DQS read and write paths on modern DDR memory. Duty cycle distortion in the read and write paths is created by the memory controller driver, channel, receiver, and/or digital latches in a DDR memory system. One of the common processes of training a bus or byte of DQ bits is by changing the receivers reference voltage (VREF) and observing what value yields the largest eye opening when the DQ to DQS internal delay is varied. This process not only finds the largest opening in the data eye but also compensates for data path duty cycle distortion of the DQ. DQ duty cycle distortion after the DQ receiver and all the way to the first latch is compensated for by adjusting the VREF. The DQ duty cycle distortion that originated from the clock, however, is not compensated for (or trained out) by this method.
While the duty cycle distortion in DQ can typically be trained out (as described above), DQS also can have duty cycle distortion that degrades margin.